Timing Verification of Dynamic Circuits
نویسندگان
چکیده
A complete set of rules is presented for timing verification of domino-style dynamic circuits. These rules include identification of dynamic nodes, generation of accurate timing constraints based on the operating environment of the gate and verification as an enhanced part of a complete timing verification process. This methodology has been implemented in a new static timing verifier and used to verify microprocessor circuits.
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تاریخ انتشار 1995